How Does a Buck Converter Work? Worked 12 V to 3.3 V • The Science 360

Q: What is the duty cycle formula for a buck converter?

In continuous conduction, D = Vout / Vin. For 12 V to 3.3 V, D = 0.275, so the high-side switch is on for 27.5% of each period. Real converters run slightly higher, because the controller has to make up for resistive and switching losses.

Quick answer A buck converter switches the input on for a fraction D of each cycle and smooths the result with an inductor and capacitor. Because an inductor's average voltage must be zero in steady state, the output settles at

V_{\mathrm{out}} = D\,V_{\mathrm{in}}

. Energy is shuttled through the inductor rather than burned, so efficiencies of 90 to 95% are normal.

Infographic: How does a buck converter work? A 12 V square wave feeds a wound 8.2 µH inductor and gives a smooth 3.3 V output. From 12 V to 3.3 V at 2 A, a linear regulator wastes 17.4 W and a synchronous buck about 0.35 W. The duty cycle is 0.275 and the input draws only 0.58 A. A chart of inductor current over two 2 µs cycles shows the same slopes at 2 A (peak 2.29 A) and at 0.1 A with a diode, where current stops at zero. Tiles: 27.5% is the best any linear regulator can do here; the buck models at 94.9%; 6.8 mV of ripple. Myth: a buck does not burn off extra volts. — Tap the image to view it full size. View the accessible, editable SVG.

Take a 12 V supply and a board that needs 3.3 V at 2 A. A linear regulator will do it, and it will turn 17.4 W into heat while delivering 6.6 W to your circuit. That is a small electric heater bolted to your PCB. A buck converter in the same spot, built from two switches, an 8.2 µH inductor and a 22 µF capacitor, wastes around a third of a watt.

The usual explanations say the switch "chops" the voltage and a filter "averages" it. True, but it hides the one idea that makes the whole thing obvious, and it leaves out why the input current is lower than the output current. We will derive the converter from a single rule about inductors, then size a real design with numbers, and plot what every node actually does.

The circuit: two switches, an inductor and a capacitor

Schematic of a synchronous buck converter from 12 V to 3.3 V: high-side switch Q1, low-side switch Q2, 8.2 µH inductor, 22 µF output capacitor and 2 A load, with the current path for each switch state drawn in blue and orange. — Figure 1. A synchronous buck. When Q1 is on (blue), the inductor connects to 12 V. When Q1 turns off, Q2 (or a diode) gives the inductor current somewhere to go (orange). The load current flows continuously in both states.

The high-side switch Q1 connects the switch node (SW) to the input. When it opens, the low-side switch Q2 closes and ties SW to ground. In a cheaper non-synchronous buck, Q2 is a Schottky diode that conducts on its own when SW tries to go negative. Either way, the switch node is a square wave between 0 V and 12 V.

The inductor sits between that square wave and the output. Its job, and this is the crux, is to refuse sudden changes in current. The voltage across an inductor sets how fast its current changes: $v = L\,di/dt$ . Apply a positive voltage and the current ramps up; apply a negative voltage and it ramps down. The current through it cannot jump, which is exactly why Q2 or the diode must exist. Open Q1 with nothing else connected and the inductor would drive the switch node as far negative as it takes to keep current flowing, usually until something breaks down. The same physics is behind the relay flyback diode.

Volt-second balance: why Vout = D × Vin

Here is the rule. In steady state, the inductor current at the end of each switching period must equal the current at the start, otherwise it would grow or shrink without limit. Since $di/dt = v/L$ , the total change over a period is $1/L$ times the area under the voltage curve. Zero change means zero area: the volt-seconds the inductor gets while Q1 is on must exactly cancel the volt-seconds while Q1 is off.

Q1 on, for time DT, and Q1 off, for time (1 − D)T:

\begin{aligned}v_L &= V_{\mathrm{in}} - V_{\mathrm{out}}\ \ (\text{on}) \\ v_L &= -V_{\mathrm{out}}\ \ (\text{off})\end{aligned}

Volt-second balance:

\begin{aligned}&(V_{\mathrm{in}} - V_{\mathrm{out}})DT \\ &\quad - V_{\mathrm{out}}(1 - D)T = 0 \\ &DV_{\mathrm{in}} - V_{\mathrm{out}} = 0 \\ &\mathbf{V_{out} = D\,V_{in}}\end{aligned}

For 12 V to 3.3 V:

D = 3.3/12 = \mathbf{0.275}

Square wave of inductor voltage, plus 8.7 V for 0.55 microseconds and minus 3.3 V for 1.45 microseconds; the shaded positive and negative areas are both 4.79 volt-microseconds. — Figure 2. At 500 kHz the period is 2 µs. Q1 is on for $0.275 \times 2 = 0.55\ \mu\mathrm{s}$ , during which the inductor sees +8.7 V. For the remaining 1.45 µs it sees −3.3 V. Both areas equal 4.79 V·µs, so the current returns to its starting value every cycle.

Notice what the derivation does not contain: load current, inductance, frequency. In continuous conduction the duty cycle depends only on the voltage ratio. This corrects a common intuition that you "need more on-time to deliver more current". Ideally you do not. A real controller nudges D up a little as load rises, but only to make up for resistive drops, not because the physics demands it.

Where does the extra current come from?

The second misconception is that a buck converter "drops" the excess voltage the way a resistor or linear regulator does. It does not. Look at Figure 1 again: during the orange interval the load is fed by the inductor and Q2, and the input supplies nothing at all. The input only delivers current during the blue interval, 27.5% of the time.

\begin{aligned}I_{\mathrm{in}} &\approx D\,I_{\mathrm{out}} = 0.275 \times 2\ \mathrm{A} \\ &= 0.55\ \mathrm{A}\ (\text{ideal}) \\ P_{\mathrm{in}} &= 12 \times 0.55 = 6.6\ \mathrm{W} \\ P_{\mathrm{out}} &= 3.3 \times 2 = 6.6\ \mathrm{W}\end{aligned}

With 94.9% efficiency (Figure 5):

I_{\mathrm{in}} = \frac{6.6\ \mathrm{W}}{0.949 \times 12\ \mathrm{V}} \approx \mathbf{0.58\ A}

So the converter behaves like a DC transformer: voltage down by a factor of 3.6, current up by the same factor. If you size the 12 V supply for 2 A because "the load takes 2 A", you have overbuilt it by more than three times.

Worked design: 12 V to 3.3 V at 2 A, 500 kHz

Now let us size a real power stage, following the procedure in TI's application note SLVA477 ("Basic Calculation of a Buck Converter's Power Stage"). The note recommends choosing the inductor so the peak-to-peak ripple current is 20 to 40% of the maximum output current. We will aim for 30%.

Step 1: inductor

During the on-time the inductor current rises at $(V_{\mathrm{in}} - V_{\mathrm{out}})/L$ for a time $D/f$ , which gives the ripple formula directly.

\Delta I_L = \frac{(V_{\mathrm{in}} - V_{\mathrm{out}})\,D}{L f}

Target ΔI_L = 0.30 × 2 A = 0.6 A:

\begin{aligned}L &= \frac{(12 - 3.3) \times 0.275}{0.6 \times 500\,000} \\ &= \frac{2.3925}{300\,000} = \mathbf{7.97\ \mu H}\end{aligned}

Nearest standard value: 8.2 µH. Actual ripple:

\begin{aligned}\Delta I_L &= \frac{2.3925}{8.2{\times}10^{-6} \times 500\,000} \\ &= \mathbf{0.584\ A}\ (29\%) \\ I_{\mathrm{peak}} &= 2 + 0.584/2 = \mathbf{2.29\ A} \\ I_{\mathrm{valley}} &= 2 - 0.292 = \mathbf{1.71\ A}\end{aligned}

The inductor must carry 2.29 A peak without saturating and about 2 A RMS without overheating. A real part such as the Coilcraft XAL6060-822 (8.2 µH) lists 24 mΩ typical DCR and 8.4 A saturation current, which is plenty of margin. Its copper loss at 2 A is about $2^2 \times 0.024 = 0.1\ \mathrm{W}$ .

Step 2: output capacitor

The capacitor absorbs the AC part of the inductor current: the triangle above and below 2 A. The charge in one half of that triangle sets the capacitive ripple, and the ESR adds a term proportional to ΔI. SLVA477 gives both.

Target ripple: 10 mV (0.3% of 3.3 V).

\begin{aligned}C_{\mathrm{out(min)}} &= \frac{\Delta I_L}{8 f\,\Delta V_{\mathrm{out}}} \\ &= \frac{0.584}{8 \times 500\,000 \times 0.010} \\ &= \mathbf{14.6\ \mu F}\end{aligned}

Choose 22 µF effective. Capacitive ripple, then ESR ripple with a 3 mΩ ceramic:

\begin{aligned}\Delta V_C &= \frac{0.584}{8 \times 500\,000 \times 22\,\mu} = \mathbf{6.6\ mV} \\ \Delta V_{\mathrm{ESR}} &= 0.003 \times 0.584 = \mathbf{1.75\ mV}\end{aligned}

Simulated combined waveform (Figure 3): 6.8 mV peak to peak.

The two ripple terms do not simply add, because the capacitive ripple is a series of parabolas that lags the triangular ESR ripple by a quarter cycle. That is why the computed total in Figure 3 is 6.8 mV, not 8.4 mV.

The word "effective" matters. A 22 µF X5R ceramic in a small package can lose half or more of its capacitance at 3.3 V of DC bias. Analog Devices' tutorial on the subject is titled, memorably, "Why Your 4.7 µF Capacitor Becomes a 0.33 µF Capacitor". In practice you might fit two 22 µF 0805 or 1206 parts to land at 22 µF of real capacitance. Our why 100nF decoupling capacitor post covers DC bias and ESL in more detail; the same parasitics decide how well this output capacitor works above a few MHz.

Three stacked computed waveforms over three switching periods: switch node square wave between 0 and 12 V, triangular inductor current between 1.71 and 2.29 A, and output voltage ripple of 6.8 millivolts peak to peak. — Figure 3. Waveforms computed from the design values. The switch node is high for 0.55 µs of every 2 µs. The inductor current ramps up while it is high and down while it is low. The output ripple is mostly the integral of the capacitor current (parabolic arcs), with a small ESR kink at each switching edge.

CCM vs DCM: what happens at light load

Everything so far assumed the inductor current never reaches zero, called continuous conduction mode (CCM). The triangle has a fixed height of 0.584 A regardless of load, so as the load drops, the triangle slides down. At an average of $\Delta I/2 = 0.29\ \mathrm{A}$ , the valley just touches zero. That is the boundary.

Below 0.29 A two things can happen, and which one depends on the low-side switch. A diode cannot conduct backwards, so the current stops at zero and sits there until the next cycle: discontinuous conduction mode (DCM). In DCM, volt-second balance still holds, but the third, idle interval changes the arithmetic and the duty cycle now depends on load.

DCM duty cycle:

D = \sqrt{\frac{2 L V_{\mathrm{out}} I_{\mathrm{out}}}{(V_{\mathrm{in}} - V_{\mathrm{out}})\,V_{\mathrm{in}}\,T}}

At 0.1 A:

\begin{aligned}D &= \sqrt{\frac{2 \times 8.2\mu \times 3.3 \times 0.1}{8.7 \times 12 \times 2\mu}} \\ &= \sqrt{0.0259} = \mathbf{0.161} \\ I_{\mathrm{peak}} &= \frac{8.7 \times 0.161 \times 2\ \mu\mathrm{s}}{8.2\ \mu\mathrm{H}} = \mathbf{0.34\ A}\end{aligned}

The on-time shrinks from 0.275 to 0.161. A MOSFET low-side switch, on the other hand, conducts in both directions. If the controller runs in forced PWM, the current simply goes negative for part of the cycle, the converter stays in CCM and D stays at 0.275. That keeps the frequency fixed and ripple predictable, at the cost of circulating current that does no useful work. Many modern regulators switch to a pulse-skipping or PFM mode at light load to avoid this loss.

Inductor current waveforms: at 2 A a triangle between 1.71 and 2.29 A, at 0.29 A a triangle touching zero, at 0.1 A in a diode buck short triangles with idle gaps at zero, and in a forced-PWM synchronous buck a triangle dipping below zero. — Figure 4. Same converter at four operating points. The CCM triangles have identical slopes; only their average moves. The diode buck at 0.1 A (orange) enters DCM with a shorter on-time and an idle interval.

Synchronous vs diode buck: where the watts go

The non-synchronous buck pays the diode's forward voltage every time it freewheels, and at a low output voltage it freewheels most of the time. ROHM's application material puts a Schottky's forward drop at 0.3 to 0.5 V at 1 A, against about 50 mV for a 50 mΩ MOSFET. With our numbers:

\begin{aligned}P_{\mathrm{diode}} &= V_F I_{\mathrm{out}} (1 - D) \\ &= 0.45 \times 2 \times 0.725 = \mathbf{0.65\ W} \\ P_{\mathrm{sync}} &\approx I_{\mathrm{rms}}^2 R_{DS(on)} (1 - D) \\ &= 4.03 \times 0.040 \times 0.725 = \mathbf{0.12\ W}\end{aligned}

Linear regulator, for comparison:

\begin{aligned}P &= (12 - 3.3)\ \mathrm{V} \times 2\ \mathrm{A} = \mathbf{17.4\ W} \\ \eta &= 3.3/12 = \mathbf{27.5\%}\end{aligned}

That 27.5% is not a property of a bad regulator. It is the ceiling for any linear regulator at this ratio, since the same current flows in and out and only the voltage changes. A linear regulator here throws away 72.5% of the input power, because 8.7 of every 12 volts has nowhere to go but heat.

Efficiency against load current from 0.05 to 3 A: the synchronous buck peaks near 96 percent and is 94.9 percent at 2 A, the diode buck is 88.3 percent at 2 A, and a linear regulator is fixed at 27.5 percent. — Figure 5. Efficiency from a simple loss model: conduction in both switches and the inductor DCR, switching transitions, gate drive and 1 mA of quiescent current. Core loss and switch-node capacitance losses are left out, so real curves sit a few points lower, especially at light load.

At 2 A the model gives 94.9% for the synchronous design and 88.3% for the diode version: 0.35 W against 0.88 W of loss. The gap closes at light load, where fixed losses dominate and the diode version's natural DCM helps it. That matches the industry view (DigiKey has an article titled "Nonsynchronous Buck Converters Offer Higher Efficiency at Lighter Loads"). For a 3.3 V, 2 A rail, synchronous is the default for good reason; for a 24 V to 12 V, 100 mA rail, a diode may be fine.

Practical checks before you build one

Layout first. The input capacitor, Q1 and Q2 form a loop that carries current switching in nanoseconds. Keep it as small as possible, with the input ceramic right at the switch pins. A long loop rings and radiates.
Peak current, not average. Check the IC's current limit and the inductor's saturation rating against the 2.29 A peak, plus margin for load transients.
Real capacitance. Derate ceramics for DC bias at the output voltage, and remember the input capacitor sees pulses of 2.29 A, so its RMS rating matters.
Gate drive. If you are building with discrete MOSFETs, the switching edge speed is set by the gate resistor. See how to choose a MOSFET gate resistor value.

The whole converter rests on one principle: an inductor will not let its current change suddenly, and over a full cycle its average voltage has to be zero. Everything else, the duty cycle, the ripple, the boundary of DCM and even the efficiency advantage, follows from that with a few lines of algebra.

FAQ

How does a buck converter reduce voltage?

It switches the input on and off at a fixed frequency and feeds the chopped voltage into an inductor and capacitor. In steady state the inductor's average voltage must be zero, which forces the output to equal the average of the switch node: $V_{\mathrm{out}} = D\,V_{\mathrm{in}}$ . Energy is stored in the inductor and passed on, not burned off, so input current is lower than output current.

What is the duty cycle formula for a buck converter?

In continuous conduction, $D = V_{\mathrm{out}}/V_{\mathrm{in}}$ . For 12 V to 3.3 V, $D = 0.275$ , so the high-side switch is on for 27.5% of each period. Real converters run slightly higher, because the controller has to make up for resistive and switching losses.

Why use a buck converter instead of a linear regulator?

A linear regulator's efficiency can never exceed Vout/Vin. From 12 V to 3.3 V at 2 A it is at best 27.5% efficient and dissipates 17.4 W as heat. A buck converter doing the same job is typically 88 to 95% efficient and wastes well under 1 W.

What happens if the inductor is too small in a buck converter?

Ripple current rises in inverse proportion to inductance. That raises the peak current (which can trip the IC's current limit or saturate the inductor), increases output voltage ripple and RMS losses, and pushes the converter into discontinuous mode at higher loads.

What is the difference between a synchronous and a non-synchronous buck converter?

A non-synchronous buck uses a Schottky diode as the low-side switch, which drops 0.3 to 0.5 V. A synchronous buck replaces it with a MOSFET that drops only tens of millivolts. At low output voltage and high current the synchronous version is several points more efficient; at very light load the diode version can be competitive.

Sources

Brigitte Hauke, "Basic Calculation of a Buck Converter's Power Stage", Texas Instruments application note SLVA477. ti.com
R. W. Erickson and D. Maksimović, Fundamentals of Power Electronics, chapter 2 (inductor volt-second balance), as presented in University of Liège ELEC0055 course slides. uliege.be
ROHM TechWeb, "Differences between Synchronous and Nonsynchronous Rectifying DC-DC Conversion". techweb.rohm.com
DigiKey, "Nonsynchronous Buck Converters Offer Higher Efficiency at Lighter Loads". digikey.com
Coilcraft XAL6060-822 product data (8.2 µH, 24 mΩ typical DCR, 8.4 A Isat). coilcraft.com
Mark Fortunato, "Temperature and Voltage Variation of Ceramic Capacitors, or Why Your 4.7µF Capacitor Becomes a 0.33µF Capacitor", Analog Devices. analog.com

Header image: NASA (image GRC-2000-C-00235), regraded for this article.