How Does a Boost Converter Work? Worked 3.7 V to 5 V • The Science 360

Q: What is the duty cycle formula for a boost converter?

For an ideal boost converter in continuous conduction, Vout = Vin / (1 - D), so D = 1 - Vin/Vout. Texas Instruments recommends D = 1 - (Vin x efficiency)/Vout for design, because the converter must also supply its own losses. For 3.7 V to 5 V that gives 0.26 ideal and about 0.33 with 90% efficiency.

Q: What is the maximum voltage gain of a boost converter?

The ideal formula 1/(1 - D) has no limit, but a real converter does. With a total series resistance RL and load R, the gain peaks at 1/(2 x sqrt(RL/R)) and then falls as D increases further. Minimum off time, switch voltage ratings and parasitic capacitance add more limits, so very high ratios use two stages, a coupled inductor or a transformer instead.

Open a cheap USB power bank and you will find one lithium cell, nominally 3.7 V, feeding a USB port that has to sit at 5 V. Between them sit a tiny chip, an inductor and a few ceramic capacitors. When your phone pulls 1.5 A from that port, the cell is delivering about 2.25 A, and when the cell sags toward empty it is delivering more than 3 A. The trick is that an inductor refuses to let its current change suddenly, and a switch exploits that a million times a second.

Most explanations end with $V_{\mathrm{out}} = V_{\mathrm{in}}/(1 - D)$ and add that as D approaches 1 the output "goes to infinity", limited only by vague "losses". In a real converter the gain curve turns over: past a certain duty cycle the output voltage falls. Below we build the converter from the inductor up, work a real 3.7 V to 5 V design from a TI datasheet, and show exactly where the infinite-gain picture breaks.

Quick answerA boost converter closes a switch to ramp up current in an inductor, then opens it. The inductor keeps the current flowing, so its voltage adds to the input and pushes current through a diode into the output capacitor. Ideally

V_{\mathrm{out}} = V_{\mathrm{in}}/(1 - D)

, and input current exceeds output current by the same ratio.

Infographic: How does a boost converter work? A circuit shows a lithium cell, a 1 µH inductor, a switch to ground, a diode and an output capacitor making 5 V. When a phone pulls 1.5 A at 5 V, the 3.7 V cell supplies 2.25 A, rising to 3.09 A at 2.7 V. A line chart of voltage gain against duty cycle shows the ideal 1/(1 − D) curve heading to infinity while the real curve with copper loss peaks at 3.4 times near D = 0.85, then falls. Tiles: 94% efficiency, a 235 kHz right-half-plane zero and 13% current-limit headroom at 2.7 V. The diode clamps the inductor, so there is no voltage spike. — Tap the image to view it full size. View the accessible, editable SVG.

The circuit: one inductor, one switch, one diode, one capacitor

The boost is the buck converter's parts rearranged: the inductor runs from the battery to a switching node (SW), a low-side MOSFET goes from SW to ground, and a diode (or a second MOSFET) goes from SW to the output capacitor. As in how a buck converter works, two rules carry everything: in steady state the average inductor voltage is zero, and so is the average capacitor current.

Schematic of a boost converter: a 3.7 volt battery, a 1 microhenry inductor to the switching node, an N-channel MOSFET from the switching node to ground driven by PWM, a Schottky diode from the switching node to a 5 volt output with a 22 microfarad capacitor and a 1.5 amp load. Blue arrows show current through the inductor and MOSFET when the switch is on; orange arrows show current through the inductor, diode and load when it is off; a dashed purple loop shows the capacitor feeding the load while the switch is on. — Figure 1. The two states. With Q1 on, inductor current ramps up and the capacitor alone carries the load. With Q1 off, the current's only path is the diode, so the inductor voltage reverses and adds to the battery.

Switch on (time D·T). The full battery voltage sits across the inductor, so its current rises at $V_{\mathrm{in}}/L$ : 3.7 A per microsecond for 3.7 V across 1 µH. The diode is reverse biased, and the capacitor alone feeds the load.

Switch off (time (1 − D)·T). The inductor current cannot stop instantly, so SW rises until the diode conducts, a fraction of a volt above V_out. The inductor now sees $3.7 - 5 = -1.3\ \mathrm{V}$ and its current ramps down slowly while it feeds the output.

Is the boost converter’s “inductor kick” a high-voltage spike?

Hobby explanations often describe the off phase as the inductor's "back EMF" producing a voltage spike that the diode collects. In a working boost there is no spike. The diode and output capacitor clamp the inductor voltage to V_out − V_in plus a diode drop, here 1.3 to 1.7 V, and the switch node is a clean square wave between 0 V and V_out (Figure 2). The inductor behaves like a current source topping up a reservoir.

The spike story is what happens when the clamp is missing. Disconnect the output, or let a diode fail open, and the energy in the inductor has to go into whatever capacitance sits on the switch node.

Energy in the inductor at the 2.87 A peak (worked example below):

E = \tfrac12 L I^2 = \tfrac12 \times 1\ \mu\mathrm{H} \times 2.87^2 = 4.1\ \mu\mathrm{J}

Dumped into an assumed 500 pF of switch-node capacitance (our round number):

V = \sqrt{2E/C} = \sqrt{\frac{2 \times 4.1\ \mu\mathrm{J}}{500\ \mathrm{pF}}} \approx 128\ \mathrm{V}

On a switch rated for about 6 V, that means avalanche or a dead chip. It is the same physics that makes a relay coil need a flyback diode; in a boost, the diode is the path the energy is meant to take.

Volt-second balance: where Vout = Vin/(1 − D) comes from

In steady state the current rise during the on time equals the fall during the off time. Since $di/dt = v/L$ , volts multiplied by time must cancel:

\begin{aligned}\text{On: } v_L &= V_{\mathrm{in}},\ \text{for } DT \\ \text{Off: } v_L &= V_{\mathrm{in}} - V_{\mathrm{out}},\ \text{for } (1 - D)T\end{aligned}

Balance:

\begin{aligned}&V_{\mathrm{in}} D + (V_{\mathrm{in}} - V_{\mathrm{out}})(1 - D) = 0 \\ &V_{\mathrm{in}} = V_{\mathrm{out}}(1 - D) \\ &\mathbf{V_{out} = V_{in}/(1 - D)} \\ &D = 1 - V_{\mathrm{in}}/V_{\mathrm{out}}\end{aligned}

3.7 V to 5 V:

D = 1 - 3.7/5 = \mathbf{0.26}

The diode conducts only during the off time, so charge balance on the capacitor gives the currents:

\begin{aligned}I_{\mathrm{out}} &= (1 - D)\,I_L \\ I_L &= I_{\mathrm{out}}/(1 - D) = I_{\mathrm{in}}\end{aligned}

Check power:

\begin{aligned}V_{\mathrm{in}} I_{\mathrm{in}} &= V_{\mathrm{in}} I_{\mathrm{out}}/(1 - D) \\ &= V_{\mathrm{out}} I_{\mathrm{out}}\ \checkmark\end{aligned}

A boost converter is a DC transformer: voltage up, current down, and every milliohm on the input side (cell, connector, winding, low-side switch) carries the larger current.

TI's design note SLVA372 adds one correction: the converter must also supply its own losses, so $D = 1 - V_{\mathrm{in}}\eta/V_{\mathrm{out}}$ , with η an efficiency estimate (TI suggests 80% as conservative; the TPS61023 datasheet uses 90%).

Worked design: 3.7 V to 5 V at 1.5 A with the TPS61023

TI's TPS61023 synchronous boost has exactly this as its typical application: one lithium cell (2.7 to 4.35 V) to 5 V at 1.5 A. Key datasheet numbers: 1 MHz switching, a valley current limit of 3.7 A typical and 2.7 A minimum, 47 mΩ low-side and 68 mΩ high-side MOSFETs, and recommended 1 µH inductors such as the Coilcraft XEL4030-102ME (9.78 mΩ DCR, 9 A saturation).

Step 1: duty cycle (TI form, η = 0.9)

D = 1 - (3.7 \times 0.9)/5 = \mathbf{0.334}

Step 2: average inductor current = battery current

\begin{aligned}I_{L(DC)} &= \frac{V_{\mathrm{out}} I_{\mathrm{out}}}{V_{\mathrm{in}}\,\eta} = \frac{5 \times 1.5}{3.7 \times 0.9} \\ &= \mathbf{2.25\ A}\end{aligned}

Step 3: ripple

\begin{aligned}\Delta I_L &= \frac{V_{\mathrm{in}} D}{L f} = \frac{3.7 \times 0.334}{1\ \mu\mathrm{H} \times 1\ \mathrm{MHz}} \\ &= \mathbf{1.24\ A\ pk\text{-}pk}\end{aligned}

Step 4: peak and valley

\begin{aligned}I_{\mathrm{peak}} &= 2.25 + 1.24/2 = \mathbf{2.87\ A} \\ I_{\mathrm{valley}} &= 2.25 - 0.62 = \mathbf{1.63\ A}\end{aligned}

Three stacked waveforms over three 1 microsecond switching periods for a 3.7 to 5 volt boost converter at 1.5 amps. The switch node voltage alternates between 0 volts while the switch is on and 5 volts while it is off. The inductor current ramps between 1.63 and 2.87 amps around an average of 2.25 amps. The diode current is zero during the on time and follows the falling inductor current during the off time, averaging 1.5 amps. — Figure 2. Computed waveforms for the worked example (D = 0.334). Only the orange slices of the battery current reach the output.

The ripple is 55% of the average, above the datasheet's advisable 40%, a trade its own 1 µH choice makes for size. The design must also work at the bottom of the battery's range:

At V_in = 2.7 V:

\begin{aligned}D &= 1 - (2.7 \times 0.9)/5 = 0.514 \\ I_{L(DC)} &= 7.5/(2.7 \times 0.9) = \mathbf{3.09\ A} \\ \Delta I_L &= 2.7 \times 0.514/1 = 1.39\ \mathrm{A}\end{aligned}

That is 3.09 A from the battery, with a peak of 3.78 A and a valley of 2.39 A. With the inductor 30% low (0.7 µH, the datasheet's suggested margin), ΔI_L = 1.98 A, so the peak is 4.08 A and the valley 2.10 A.

The TPS61023 limits the valley of the inductor current. At full load and minimum battery the valley is 2.39 A against a guaranteed 2.7 A, about 13% headroom: the real constraint on this design, and invisible if you only compute the 3.7 V case.

Step 5: output capacitor (datasheet equation, ±50 mV ripple = 0.1 V peak to peak)

\begin{aligned}C_{\mathrm{out}} &\ge \frac{I_{\mathrm{out}} D_{\max}}{f\,V_{\mathrm{ripple}}} = \frac{1.5 \times 0.514}{1\ \mathrm{MHz} \times 0.1\ \mathrm{V}} \\ &= \mathbf{7.7\ \mu F}\ \text{effective}\end{aligned}

The datasheet warns that a ceramic capacitor "can lose more than 50% of its capacitance at its rated voltage", so a 10 µF, 6.3 V part at 5 V may deliver well under 7.7 µF; two 22 µF parts is a sensible build. The output current arrives in the chopped pulses of Figure 2, so low-ESR ceramics placed tight to the chip matter more than in a buck (see also why 100 nF is the standard decoupling capacitor).

Step 6: where the losses go. Here is our own rough conduction-loss budget at 3.7 V, using datasheet resistances:

\begin{aligned}I_{\mathrm{rms}} &= \sqrt{2.25^2 + 1.24^2/12} = 2.28\ \mathrm{A} \\ P_{\mathrm{DCR}} &= 2.28^2 \times 0.00978 = 0.051\ \mathrm{W} \\ P_{\mathrm{low}} &= 0.334 \times 2.28^2 \times 0.047 = 0.082\ \mathrm{W} \\ P_{\mathrm{high}} &= 0.666 \times 2.28^2 \times 0.068 = 0.236\ \mathrm{W} \\ P_{\mathrm{total}} &\approx \mathbf{0.37\ W}\end{aligned}

The three losses are the inductor DCR, the low-side FET and the high-side FET. The total conduction loss is about 4.9% of the 7.5 W output.

TI quotes 94% at 3.6 V in and 5 V, 1.5 A out, about 0.48 W of total loss, which leaves roughly 0.1 W for switching and core loss. The high-side switch dominates, yet a 0.4 V Schottky in its place would burn $1.5\ \mathrm{A} \times 0.4\ \mathrm{V} = 0.6\ \mathrm{W}$ by itself.

Chart of current versus battery voltage from 2.7 to 4.35 volts for a 5 volt 1.5 amp boost output at 90 percent efficiency. Battery current rises from 1.9 amps at 4.35 volts to 3.1 amps at 2.7 volts. Peak inductor current reaches 3.8 amps with 1 microhenry and 4.1 amps with 0.7 microhenry. Valley current reaches 2.4 amps with 1 microhenry, approaching the TPS61023 minimum valley limit of 2.7 amps. The output current stays at 1.5 amps. — Figure 3. Currents in the worked design across the lithium-cell range, from the TI equations. The minimum valley limit, not the typical one, sets the usable load at low battery.

A cell with 100 mΩ of internal resistance loses 0.31 V at 3.1 A, which raises the current further; that is why boost-powered gadgets fall off a cliff near empty. For sizing the cell, see the LiPo C rating and battery life calculations.

Why doesn’t D → 1 give infinite voltage?

The ideal formula says D = 0.9 gives 10 times the input and 0.99 gives 100 times. Real converters do not get close, for a reason you can calculate.

Put a resistance R_L in series with the inductor for winding and switch resistance. Erickson and Maksimović's Fundamentals of Power Electronics writes the same balance equations with it included, $0 = V_{\mathrm{in}} - I R_L - (1 - D)V$ and $0 = (1 - D)I - V/R$ . Solving:

\frac{V_{\mathrm{out}}}{V_{\mathrm{in}}} = \frac{1}{1 - D} \cdot \frac{1}{1 + \dfrac{R_L}{(1 - D)^2 R}}

Setting the derivative to zero (our algebra):

\begin{aligned}\text{peak at } 1 - D &= \sqrt{R_L/R} \\ \text{max gain} &= \frac{1}{2\sqrt{R_L/R}}\end{aligned}

Worked example: R = 5 V / 1.5 A = 3.33 Ω, R_L ≈ 0.07 Ω lumped (DCR plus FETs), so R_L/R = 0.021:

\text{max gain} = \frac{1}{2 \times 0.146} = \mathbf{3.4}\ \ \text{at } D = 0.85

The inductor current is $I_{\mathrm{out}}/(1 - D)$ , so copper loss grows as $(1 - D)^{-2}$ , and eventually each extra percent of duty cycle burns more than it delivers. At the gain peak, efficiency is exactly 50% (lower half of Figure 4).

Top: output to input voltage ratio versus duty cycle from 0 to 1. The ideal 1 over 1 minus D curve rises steeply past 10. With resistance ratios of 0.005, 0.01, 0.021 and 0.05 the curves peak at 7.1, 5.0, 3.4 and 2.2 at duty cycles between about 0.78 and 0.93, then fall to zero at D equal to 1. Bottom: efficiency versus duty cycle for the same resistance ratios, near 100 percent at low duty and falling steeply toward zero above 0.8. — Figure 4. Gain and copper-loss efficiency from the Erickson model, computed for four values of R_L/R. The orange curve uses our lumped estimate for the TPS61023 example. Past the peak, more duty cycle means less output voltage.

The turnover is nasty for feedback. Past the peak the loop sees the output low, increases D, the output falls further, and the controller drives itself to maximum duty with a collapsed output and a hot inductor. That is one reason controllers have a duty-cycle clamp and a current limit.

Copper is the first wall. The second is time: the TPS61023's minimum off time is 120 ns maximum, which at a 1 µs period caps D at 0.88 and the ideal gain at 8.3. The third is voltage: a 3.7 V to 370 V boost needs a switch rated above 370 V that charges its own capacitance to 370 V and dumps it every cycle.

Our illustrative numbers for a 100× boost: switch capacitance 50 pF, 370 V, 100 kHz.

\begin{aligned}P &= \tfrac12 C V^2 f \\ &= \tfrac12 \times 50\ \mathrm{pF} \times 370^2 \times 100\ \mathrm{kHz} \\ &= \mathbf{0.34\ W}\end{aligned}

At 10 mA out (3.7 W), that is 9% lost before any conduction loss.

So high ratios use two cascaded boosts (gains multiply), a coupled inductor or flyback transformer, or a capacitor multiplier after the boost.

Source note Engineers often quote a practical single-stage boost ratio of roughly 5 to 10 times, or a maximum duty cycle near 0.8 to 0.9. I did not find a primary source that states this as a rule; it is consistent with the copper-loss model and the TPS61023 minimum off time above, but treat it as folklore. The 500 pF switch-node and 50 pF switch capacitances used in the two illustrative calculations are round numbers I chose, not datasheet values. Likewise the "crossover at a fifth of f_RHP or less" guideline in the next section is a common design habit; the TI note I read only says "considerably less".

The right-half-plane zero: why boost loops are slow

To raise the output, the controller increases D. But a longer on time means longer with the inductor disconnected from the output, so for the next few cycles the output gets less energy. TI's SLVA633 puts it plainly: "the output initially drops, even though the control command is trying to make it increase."

Averaged-model simulation of an open-loop boost converter. Top: output voltage, steady near 4.8 volts, then after a duty cycle step from 0.26 to 0.40 at 40 microseconds it rings up to about 6.3 volts and settles at 5.83 volts. Middle: a zoom on the first 8 microseconds after the step shows the output first falling about 20 millivolts, bottoming 1.5 microseconds after the step and returning to its starting value about 3 microseconds after the step. Bottom: inductor current rises immediately from about 1.95 amps, overshoots to 4.4 amps and settles near 2.9 amps. — Figure 5. Our averaged-model simulation, open loop, with values chosen to make the dip visible. A real chip would hit its current limit on a step this large; the point is the initial dip, which no controller gain can remove.

A response that starts the wrong way is the signature of a right-half-plane zero. From SLVA633 and SLVA274:

f_{\mathrm{RHP}} = \frac{R_{\mathrm{load}}(1 - D)^2}{2\pi L}

\begin{aligned}3.7\ \mathrm{V}&:\ \frac{3.33 \times 0.666^2}{2\pi \times 1\ \mu\mathrm{H}} = \mathbf{235\ kHz} \\ 2.7\ \mathrm{V}&:\ \frac{3.33 \times 0.486^2}{2\pi \times 1\ \mu\mathrm{H}} = \mathbf{125\ kHz}\end{aligned}

At 2.7 V, D = 0.514.

Heavier load, lower input voltage and a larger inductor all pull it down, the opposite of a buck, where a bigger inductor is simply calmer. SLVA633 says loop bandwidth "must be limited to considerably less than the frequency of the RHP zero". A common choice is a fifth or less, about 25 kHz here at low battery, so boost rails recover from load steps more slowly than a buck at the same switching frequency.

Why can’t you switch a boost converter off?

With Q1 off forever, the battery still reaches the output through the inductor and diode, so the load sees about V_in minus a diode drop. Chips like the TPS61023 list load disconnect as a feature for this reason, and enter a pass-through mode when the input rises above the set output. The same inductor-and-duty-cycle logic, with a smarter controller, sits inside solar charge controllers (how MPPT works), and discrete designs face the gate-drive trade-offs in choosing a MOSFET gate resistor value.

The short version for your bench:

D = 1 - V_{\mathrm{in}}\eta/V_{\mathrm{out}}

. Battery current is

V_{\mathrm{out}} I_{\mathrm{out}}/(V_{\mathrm{in}}\eta)

, and you must check it at the lowest battery voltage against the chip's minimum current limit. Size C_out from

I_{\mathrm{out}} D/(f\,\Delta V)

using derated capacitance. Expect the gain to peak at 1/(2√(R_L/R)), keep the loop well below f_RHP = R(1 − D)²/(2πL), and use two stages or a transformer for big ratios.

FAQ

What is the duty cycle formula for a boost converter?

For an ideal boost converter in continuous conduction, $V_{\mathrm{out}} = V_{\mathrm{in}}/(1 - D)$ , so $D = 1 - V_{\mathrm{in}}/V_{\mathrm{out}}$ . Texas Instruments recommends $D = 1 - V_{\mathrm{in}}\eta/V_{\mathrm{out}}$ for design, because the converter must also supply its own losses. For 3.7 V to 5 V that gives 0.26 ideal and about 0.33 with 90% efficiency.

Why is the input current of a boost converter higher than the output current?

Power in equals power out plus losses. If the output voltage is higher than the input, the input current must be higher than the output current. A 5 V, 1.5 A output from a 3.7 V cell at 90% efficiency draws about 2.25 A from the cell, rising to about 3.1 A when the cell sags to 2.7 V.

What is the maximum voltage gain of a boost converter?

The ideal formula 1/(1 − D) has no limit, but a real converter does. With a total series resistance R_L and load R, the gain peaks at $1/(2\sqrt{R_L/R})$ and then falls as D increases further. Minimum off time, switch voltage ratings and parasitic capacitance add more limits, so very high ratios use two stages, a coupled inductor or a transformer instead.

What is the right-half-plane zero in a boost converter?

When the controller increases the duty cycle to raise the output, the inductor spends longer disconnected from the output, so the output first dips before it rises. This wrong-way response is a right-half-plane zero at $f = R(1 - D)^2/(2\pi L)$ . The control loop bandwidth must stay well below it.

Can you turn off a boost converter by stopping the switch?

Not in the basic circuit. With the switch off, the input still reaches the output through the inductor and diode, so the load sees roughly the input voltage minus a diode drop. Chips that need a true off state add a load-disconnect switch.

Sources

Texas Instruments, SLVA372D, Brigitte Hauke, "Basic Calculation of a Boost Converter's Power Stage" (duty cycle with efficiency, ripple and switch current): ti.com/lit/an/slva372d/slva372d.pdf
Texas Instruments, TPS61023 datasheet SLVSF14B (limits, switches, inductor and capacitor equations, application example): ti.com/lit/ds/symlink/tps61023.pdf
Texas Instruments, TPS61023 product page (94% at 3.6 V to 5 V and 1.5 A, 20 µA quiescent current, load disconnect feature): ti.com/product/TPS61023
Texas Instruments, SLVA633, "Practical Feedback Loop Analysis for Voltage-Mode Boost Converter" (RHP zero mechanism, f_RHP = R(1 − D)²/(2πL), bandwidth must be considerably less): ti.com/lit/pdf/slva633
Texas Instruments, SLVA274, "Voltage Mode Boost Converter Small Signal Control Loop Analysis Using the TPS61030" (RHP zero dependence on input voltage, load and inductance): ti.com/lit/pdf/slva274
R. W. Erickson and D. Maksimović, Fundamentals of Power Electronics, Chapter 3 slides (nonideal boost with inductor resistance R_L, balance equations, V/V_g versus D curves): Chapter 3 slides PDF
All About Circuits, "Understanding the Operation of a Boost Converter" (typical page-one explanation): allaboutcircuits.com

Method note: Figures 2, 3 and 4 are computed directly from the equations in the text. Figure 5 is our numerical integration of the standard averaged boost model (inductor and capacitor state equations with 0.07 Ω series resistance) using a 1 ns time step. The conduction-loss budget, the gain-peak algebra and the parasitic-capacitance examples are our own calculations.

Header image: NASA/JPL-Caltech (image PIA23131), regraded for this article.