Why Watch Crystals Are 32,768 Hz (and Why Not Higher) • The Science 360

Q: Why are watch crystals 32,768 Hz?

32,768 is 2 to the 15th power, so a chain of 15 divide-by-two flip-flops turns it into exactly one pulse per second. Among the powers of two, 2^15 is the lowest that sits above the range of human hearing while keeping the quartz tuning fork small enough for a wristwatch, and low enough that the oscillator and dividers draw only nanowatts to microwatts.

Q: How accurate is a 32.768 kHz crystal?

Typical parts are specified at plus or minus 20 ppm at 25 °C, which is up to 52 seconds per month before any trimming. Temperature adds a parabolic error of about minus 0.036 ppm per degree squared away from 25 °C: about 21 seconds per month slow at 10 °C and 58 seconds per month slow at 0 °C.

The first quartz wristwatch on sale, Seiko's Astron of December 1969, did not run at 32,768 Hz. Its crystal vibrated at 8,192 Hz. Two years later Girard-Perregaux's Caliber 350 ran at 32,768 Hz, and almost every quartz watch, wall clock and real-time-clock chip since has used the same number. If the only point of the number were "it is a power of two", 8,192 would have been fine, and so would 65,536. So why did the industry settle on 2¹⁵ in particular?

The usual answer, the one on most of page 1, is a three-line summary: power of two, above human hearing, small and low power. All true, and none of it quantified. Below we put numbers on each argument, then look at the part that the summaries skip: a 32,768 Hz crystal is not especially accurate, and its error follows a parabola that costs you about a minute a month in winter.

Quick answer

32{,}768 = 2^{15}

, so 15 divide-by-two flip-flops turn it into exactly one pulse per second. It is the lowest power of two above human hearing (16,384 Hz is audible), it keeps the quartz tuning fork about 2 mm long, and it needs hundreds of times less oscillator drive than a megahertz crystal.

Infographic: Why are watches 32,768 Hz? A crystal can holds a quartz tuning fork whose signal runs through 15 divide-by-two stages into a watch face. 32,768 is 2 to the 15, so fifteen flip-flops give exactly one pulse per second. It needs about 320 times less oscillator drive than a 16 MHz crystal, and 16,384 Hz, one step lower, would be audible. A line chart of drift against temperature is a downward parabola peaking at 25 °C: 21 seconds a month slow at 10 °C and 58 at 0 °C. Tiles: the crystal acts like a 4,718 henry inductor, tolerance is plus or minus 20 ppm, and the 1969 Seiko Astron ran at 8,192 Hz. — Tap the image to view it full size. View the accessible, editable SVG.

Why a power of two?

A watch needs one tick per second. The cheapest circuit that divides a frequency by two is a single toggle flip-flop: its output changes state on every rising edge of its input, so it completes one cycle for every two input cycles. Chain them and each stage halves the frequency again.

\begin{aligned}2^{15} &= 2 \times 2 \times \cdots\ (15\text{ times}) \\ &= \mathbf{32{,}768} \\ 32{,}768\ \mathrm{Hz} \div 2^{15} &= \mathbf{1\ Hz}\end{aligned}

That is from 15 identical flip-flops and no other logic.

Block diagram: a 32.768 kilohertz crystal connected to an oscillator, followed by fifteen divide-by-two stages in three rows of five. The frequencies at the stage outputs are 16,384, 8,192, 4,096, 2,048, 1,024, 512, 256, 128, 64, 32, 16, 8, 4, 2 and finally 1 hertz, which drives the stepper motor once per second. — Figure 1. The divider chain. Each box is one toggle flip-flop. Stage 2 already runs at 8,192 Hz, the Astron's crystal frequency, which is why that watch needed two fewer stages.

Any other frequency can be divided to 1 Hz too. A 32,000 Hz crystal would need a counter that resets at 32,000, which takes comparison logic on top of the flip-flops. In 1970 every gate cost area, current and yield, so the simple ripple chain won. That fixes the family (2ⁿ Hz) but not the member. For that we need the two physical constraints that pull in opposite directions.

Why not lower? The tuning fork gets big

A watch crystal is not the thin quartz slab of a megahertz crystal. It is a tiny tuning fork, cut from quartz and plated with electrodes, whose two tines flex sideways like the prongs of a musical fork. The ABS07 data sheet lists the mode as "Flexural Mode (Tuning Fork)", in a 3.2 × 1.5 × 0.9 mm package. Rakon's RTF2012 squeezes one into 2.0 × 1.2 × 0.6 mm.

For a flexing bar fixed at one end, beam theory gives the fundamental frequency as proportional to thickness over length squared:

\begin{aligned}f &= \frac{1.875^2}{2\pi} \times \frac{t}{L^2} \times \sqrt{\frac{E}{12\rho}}\end{aligned}

For quartz, E ≈ 78 GPa and ρ = 2,650 kg/m³ (our values; quartz is anisotropic)

\begin{aligned}\sqrt{E/12\rho} &= \sqrt{78{\times}10^9 / 31{,}800} \\ &= 1{,}566\ \mathrm{m/s} \\ f &\approx 0.560 \times 1{,}566 \times t/L^2 \\ &= 877 \times t/L^2\end{aligned}

(t and L in metres)

With t = 0.1 mm, solve for 32,768 Hz:

\begin{aligned}L &= \sqrt{877 \times 1{\times}10^{-4} / 32{,}768} \\ &= \sqrt{2.68{\times}10^{-6}} = \mathbf{1.64\ mm}\end{aligned}

A 1.6 mm tine fits a 2 mm package, which is a reassuring sanity check for a back-of-envelope model. Now slide the frequency down at the same tine width: length goes as $1/\sqrt{f}$ , so each halving of frequency makes the fork $\sqrt{2} = 1.41$ times longer. 8,192 Hz needs 3.3 mm tines; 1,024 Hz needs 9.3 mm; a 1 Hz fork with the same cross-section would be $1.64\ \mathrm{mm} \times \sqrt{32{,}768} = 297\ \mathrm{mm}$ long, which is the joke Jauch makes about a 1 Hz crystal belonging in Big Ben. You could make the tines thinner instead, but then they get fragile and harder to cut accurately, and the motional resistance rises.

Source note The cantilever model and the quartz values (E ≈ 78 GPa, 0.1 mm tine width) are ours, chosen only to show the scaling. Real watch forks have a shaped base, grooved tines and an elastic constant that depends on the cut angle; we did not find a manufacturer drawing with actual tine dimensions to compare against.

The hearing argument sits on the same axis. 16,384 Hz, the next power of two down, is inside the range a young person can hear, and the Wikipedia history of quartz clocks gives "just high enough to exceed the human hearing range" as one reason for 2¹⁵. We would rate it as a secondary reason: the fork sits in a sealed, evacuated can, and the dominant pressures are size and power. But 2¹⁵ does clear the hearing limit with margin, and 2¹⁴ does not.

Why not higher? Oscillator power rises with frequency squared

The crystal oscillator in a watch or a microcontroller is a Pierce circuit: an inverting amplifier with the crystal and two load capacitors in its feedback loop. It only starts if the amplifier's transconductance g_m beats a critical value set by the crystal's losses. ST's oscillator design note AN2867 gives it as:

\begin{aligned}g_{m,\mathrm{crit}} &= 4 \times \mathrm{ESR} \times (2\pi f)^2 \\ &\quad \times (C_0 + C_L)^2\end{aligned}

Frequency enters squared. Plug in real parts. The Abracon ABS07 has a maximum ESR of 70 kΩ, shunt capacitance C0 up to 1.2 pF typical, and a 12.5 pF load. Compare with a 16 MHz crystal at 40 Ω and $C_0 + C_L = 21\ \mathrm{pF}$ , the example used in our crystal load capacitor calculation:

32.768 kHz watch crystal:

\begin{aligned}2\pi f &= 2.059{\times}10^5\ \mathrm{rad/s} \\ C_0 + C_L &= 13.7\ \mathrm{pF} \\ g_{m,\mathrm{crit}} &= 4 \times 70{,}000 \times (2.059{\times}10^5)^2 \\ &\quad \times (13.7{\times}10^{-12})^2 \\ &= \mathbf{2.2\ \mu A/V}\end{aligned}

16 MHz crystal:

\begin{aligned}g_{m,\mathrm{crit}} &= 4 \times 40 \times (1.005{\times}10^8)^2 \\ &\quad \times (21{\times}10^{-12})^2 \\ &= \mathbf{713\ \mu A/V}\end{aligned}

Ratio: about 320 times more transconductance for the megahertz crystal

Transconductance costs bias current, so the oscillator's current follows the same trend. The watch crystal's ESR is 1,750 times higher than the megahertz part's, yet its $f^2$ advantage (a factor of about 240,000) wins easily. This is why microcontrollers keep a separate 32.768 kHz oscillator running in sleep and shut the fast one down, a habit that dominates the sleep-current numbers in any honest battery-life calculation. And it is why low-power RTC crystals are sold with 6 or 7 pF loads instead of 12.5 pF: drop $C_0 + C_L$ from 13.7 to 7.2 pF and g_m,crit falls by $(13.7/7.2)^2 = 3.6$ times.

The dividers add their own cost. TI's note on CMOS power gives the switching power as $P_T = C_{pd} \times V_{CC}^2 \times f_I \times N_{SW}$ : proportional to frequency. In a binary chain, each stage runs at half the speed of the one before it, so the whole chain burns only twice what the first stage does:

Stage k output switches at $f/2^k$ , so with C per stage:

\begin{aligned}P &= C V^2 f \left(\tfrac12 + \tfrac14 + \cdots + \tfrac{1}{2^{15}}\right) \\ &= C V^2 f\,(1 - 2^{-15}) \\ &\approx \mathbf{C V^2 f}\end{aligned}

That is twice the first stage alone.

Example (our assumed 10 fF per stage, 1.5 V):

\begin{aligned}P &= 10{\times}10^{-15} \times 1.5^2 \times 32{,}768 \\ &= \mathbf{0.74\ nW}\end{aligned}

Under a nanowatt for the dividers. Run the same logic from a 4,194,304 Hz (2²²) crystal and the first stages alone cost 128 times more, plus a much hungrier oscillator. Figure 3 puts the two pressures on one chart: going down in frequency, the fork grows as $1/\sqrt{f}$ ; going up, the oscillator's demand grows as $f^2$ . 2¹⁵ is the first power of two clear of the audible band where the fork is still under 2 mm.

Log-log chart of frequency from 2 to the 10 to 2 to the 20 hertz. A falling blue line shows tuning fork tine length at fixed width, from about 9 millimetres at 2 to the 10 to 0.3 millimetres at 2 to the 20, and 1.6 millimetres at 2 to the 15. A rising orange dashed line on a right axis shows required oscillator transconductance relative to 32,768 hertz, growing with frequency squared from 0.001 to 1,000. The audible band below 20 kilohertz is shaded. — Figure 3. The squeeze that picks 2¹⁵. Blue: tine length from our cantilever model at a fixed 0.1 mm width. Orange: g_m,crit relative to 32,768 Hz, at fixed ESR and capacitance. Both are scaling models, not data, but they show why the industry landed just above 20 kHz.

The misconception: “32,768 Hz crystals are very accurate”

Quartz has a reputation for precision, and the page-1 answers lean on it. A watch crystal is good compared with a pendulum, but as a frequency reference it is mediocre, and the reason is its temperature curve. A tuning fork crystal has a parabolic frequency-temperature characteristic. It runs fastest at a turnover temperature T₀ and slower on both sides:

\Delta f / f = \beta \times (T - T_0)^2

ABS07: β = −0.036 ppm/°C² typical (−0.040 limit), T₀ = 25 ± 5 °C

Rakon RTF2012: β = −0.03 ± 0.01 ppm/°C², T₀ = 25 ± 5 °C

\begin{aligned}1\ \mathrm{ppm} &= 86{,}400 \times 30 \times 10^{-6} \\ &= \mathbf{2.59\ s}\ \text{per 30 days}\end{aligned}

Now evaluate it where people actually keep clocks, with β = −0.036 and T₀ = 25 °C:

Indoors at 20 °C, a cold room at 10 °C, outdoors in winter at 0 °C, and −10 °C:

\begin{aligned}20\,^\circ\mathrm{C}&:\ -0.036 \times 5^2 = -0.9\ \mathrm{ppm} \\ &\to \mathbf{-2.3\ s/month} \\ 10\,^\circ\mathrm{C}&:\ -0.036 \times 15^2 = -8.1\ \mathrm{ppm} \\ &\to \mathbf{-21\ s/month} \\ 0\,^\circ\mathrm{C}&:\ -0.036 \times 25^2 = -22.5\ \mathrm{ppm} \\ &\to \mathbf{-58\ s/month} \\ -10\,^\circ\mathrm{C}&:\ -0.036 \times 35^2 = -44.1\ \mathrm{ppm} \\ &\to \mathbf{-114\ s/month}\end{aligned}

60 °C (car dashboard in summer): also −44 ppm, also slow

Frequency error in parts per million against temperature from minus 40 to 85 degrees Celsius. A blue downward parabola peaks at zero at 25 degrees, falling to about minus 150 ppm at minus 40 and minus 130 ppm at 85. A shaded band shows the spread for coefficients minus 0.030 to minus 0.040 and turnover from 20 to 30 degrees. Marked points: minus 10 degrees at minus 44 ppm or 114 seconds per month slow, 10 degrees at minus 8.1 ppm or 21 seconds per month, and 32 degrees on a wrist at minus 1.8 ppm. A right axis converts to seconds per 30 days. — Figure 2. The tuning fork parabola, computed from $\Delta f/f = \beta(T - T_0)^2$ . Hot or cold, the clock runs slow. At −40 °C the worst crystal in the band is off by about 196 ppm, over eight minutes a month.

Two consequences follow. First, a quartz watch is designed around your wrist. Worn, it sits within a few degrees of its turnover point (we assumed 32 °C, which costs under 2 ppm), and it keeps good time. Left in a drawer in a cold room it loses half a minute a month. Wikipedia's quartz clock article puts the same point as about 110 seconds per year for a 10 °C deviation, consistent with the numbers above. Second, the error is always in one direction, so it accumulates: a microcontroller RTC in an outdoor enclosure will drift slow all winter and all summer, and only the spring and autumn are good.

Temperature is not the only term. Figure 4 adds the manufacturing tolerance and ageing from the ABS07 data sheet.

Horizontal bar chart of possible error in seconds per 30 days. Initial tolerance of plus or minus 20 ppm before trimming: 51.8 seconds. First-year ageing of plus or minus 3 ppm: 7.8 seconds. Temperature at 32 degrees on a wrist: 4.6 seconds; at 20 degrees: 2.3 seconds; at 10 degrees: 21 seconds; at 0 degrees: 58.3 seconds. A dashed green line at 5 seconds marks the Seiko Astron's 1969 accuracy of plus or minus 5 seconds per month. — Figure 4. Error budget for a typical ±20 ppm watch crystal, in seconds per 30 days. Temperature terms use β = −0.036 ppm/°C² and T₀ = 25 °C. Watch movements are adjusted at the factory to remove most of the initial tolerance; a bare RTC on a circuit board usually is not.

The ±20 ppm tolerance is the biggest bar, 52 s/month, and it is the one that bites hobby projects: a microcontroller with an untrimmed crystal and load capacitors chosen by guesswork can easily be 20 to 30 ppm off before temperature does anything. Getting the load capacitance right (see how to calculate crystal load capacitors) removes the pulling error; trimming in firmware removes the rest of the room-temperature offset. Neither touches the parabola.

Source note Temperature-compensated RTC chips, such as the widely used DS3231, are commonly quoted at about ±2 ppm from 0 to 40 °C. We could not open the manufacturer's page to confirm the current specification, so treat that figure as indicative.

The crystal is an LC circuit with an absurd inductor

Electrically, a crystal near resonance looks like a series R, L and C (the "motional" arm) in parallel with the package capacitance C0. Rakon's RTF2012 lists a motional capacitance of 5.0 fF and a maximum ESR of 80 kΩ. The LC resonant frequency formula tells you the inductance that must go with it:

\begin{aligned}L_1 &= \frac{1}{(2\pi f)^2 \times C_1} \\ &= \frac{1}{(2.059{\times}10^5)^2 \times 5.0{\times}10^{-15}} \\ &= \mathbf{4{,}718\ H} \\ Q &= \frac{1}{2\pi f \times R_1 \times C_1} \\ &= \frac{1}{2.059{\times}10^5 \times 80{,}000 \times 5.0{\times}10^{-15}} \\ &= \mathbf{12{,}100}\end{aligned}

The Q figure is at the maximum ESR.

Four thousand henries, from a sliver of quartz you could lose under a fingernail. No wound coil comes close, and the Q of at least 12,000 is a hundred times better than a good inductor. That Q is why the oscillator locks so tightly to the crystal's frequency that a few picofarads of load only pull it by tens of ppm, and why the same idea, a clean binary or near-binary reference, shows up whenever timing has to be exact, from UART baud rates to the 8,388,608 Hz (2²³) AT-cut crystal in Citizen's Caliber 0100, rated at ±1 second per year. Higher-frequency AT-cut crystals have a flatter, cubic temperature curve, so the most accurate movements pay the power cost to escape the 32 kHz parabola.

What this means if you are designing with one

For a microcontroller RTC, pick a 6 or 7 pF load crystal if your chip's low-power oscillator supports it, calculate the load capacitors properly, and keep the traces short and guarded, because the oscillator is running at a few µA/V of transconductance and a little leakage or noise can stop it. Budget ±20 ppm initial tolerance plus the parabola for your worst-case temperature, and remember that 10 ppm is 26 seconds a month. If that is too much, either trim against a reference (GPS, NTP or mains, see why mains is 50 or 60 Hz) or buy a temperature-compensated RTC. And do not expect a 555 timer or an RC oscillator to compete: they drift by percent, not ppm.

The short version:

32{,}768 = 2^{15}

, so 15 flip-flops make 1 Hz. Lower powers of two need longer forks and drift into the audible range; higher ones cost oscillator power that rises with

f^2

. The crystal is good to about ±20 ppm at 25 °C and loses

0.036\ \mathrm{ppm} \times (\Delta T)^2

away from it: 21 s/month at 10 °C, 58 s/month at 0 °C, always slow.

FAQ

Why are watch crystals 32,768 Hz?

32,768 is 2¹⁵, so a chain of 15 divide-by-two flip-flops turns it into exactly one pulse per second. Among the powers of two, 2¹⁵ is the lowest that sits above the range of human hearing while keeping the quartz tuning fork small enough for a wristwatch, and low enough that the oscillator and dividers draw only nanowatts to microwatts.

Why not use a higher frequency crystal for a watch?

Power. The transconductance an oscillator needs to start rises with the square of frequency, and CMOS divider power rises in proportion to frequency. A 16 MHz crystal needs roughly 300 times more oscillator transconductance than a 32.768 kHz watch crystal. Some high-accuracy movements do use higher frequencies, such as 8,388,608 Hz (2²³), and accept the extra drain.

How accurate is a 32.768 kHz crystal?

Typical parts are specified at ±20 ppm at 25 °C, which is up to 52 seconds per month before any trimming. Temperature adds a parabolic error of about −0.036 ppm/°C² away from 25 °C: about 21 seconds per month slow at 10 °C and 58 seconds per month slow at 0 °C.

Does temperature make a quartz watch run fast or slow?

Slow, in both directions. A tuning fork crystal runs fastest at its turnover temperature, about 25 °C, and slows down whether it gets hotter or colder. Worn on a wrist the watch stays near its turnover point; left in a cold car or drawer it loses time.

Sources

Abracon, ABS07 32.768 kHz SMD crystal data sheet, revised 08-10-22 (flexural tuning fork mode, ±20 ppm at 25 °C, −0.036 ppm/°C² typical and −0.040 limit, turnover 25 ± 5 °C, R1 70 kΩ max, C0 0.9 to 1.2 pF typical, C_L 12.5 pF, ageing ±3 ppm first year, 3.2 × 1.5 × 0.9 mm): abracon.com/Resonators/ABS07.pdf
Rakon, RTF2012 SMD tuning fork crystal data sheet, issue D, 2022 (−0.03 ± 0.01 ppm/°C², turnover 25 ± 5 °C, C1 5.0 fF, ESR 80 kΩ, 2.0 × 1.2 × 0.6 mm): xpress.rakon.com RTF2012 PDF
STMicroelectronics, AN2867 "Guidelines for oscillator design on STM8AF/AL/S and STM32 MCUs/MPUs" ( $g_{m,\mathrm{crit}} = 4 \times \mathrm{ESR} \times (2\pi f)^2 \times (C_0 + C_L)^2$ ; formula as quoted in our crystal load capacitor post, the PDF itself returned an error when we re-checked): st.com AN2867
Texas Instruments, SCAA035B "CMOS Power Consumption and C_pd Calculation" ( $P_T = C_{pd} \times V_{CC}^2 \times f_I \times N_{SW}$ ): ti.com/lit/an/scaa035b/scaa035b.pdf
Wikipedia, "Quartz clock" (32,768 Hz above hearing yet low power; −0.035 ppm/°C², about 110 s/year at 10 °C off turnover; Girard-Perregaux Caliber 350 in 1971 at 32,768 Hz; Citizen Caliber 0100 at 8,388,608 Hz, ±1 s/year): en.wikipedia.org/wiki/Quartz_clock
Wikipedia, "Astron (wristwatch)" (8,192 Hz XY-type quartz oscillator, hybrid IC, ±5 s/month, December 1969): en.wikipedia.org/wiki/Astron_(wristwatch)
Jauch, "Why Do Tuning Fork Crystals Always Have A Frequency of 32.768 kHz?" (15 T flip-flops; typical page-one explanation; 1 Hz crystal "more suitable for the Big Ben clock tower"): jauch.com/blog/en/tuning-fork-crystal-frequency-32768-khz

Method note: Figures 2 to 4 were computed with Python from the equations shown. The tine-length curve and divider power are our own scaling models; the temperature curve uses the ABS07 typical coefficient.

Header image: NASA/Kim Shiflett (image KSC-20160301-PH-KLS02_0003), regraded for this article.